System-level post-silicon validation is a function that is both resource intensive and time consuming. This being the last stage of IC development cycle, has considerable impact on time-to-market, quality and yield. The paper is about increasing the efficiency of the process and improving the utilization of the equipment by automating switching, IO execution and data collection. In IO execution it is taking more time to complete, and also the cost of the setup is also reaches to high peaks. This allows validation-engineers to focus on speed of execution and cost of the setup, thus increasing the overall productivity of post-silicon validation process.