Institute of Electrical & Electronic Engineers
Dual-Core Execution (DCE) is an execution paradigm proposed to utilize chip multiprocessors to improve the performance of single-threaded applications. Previous research has shown that DCE provides a complexity-effective approach to building a highly scalable instruction window and achieves significant latency-hiding capabilities. In this paper, the authors propose to optimize DCE for power efficiency and/or transient-fault recovery. In DCE, a program is first processed (speculatively) in the front processor and then re-executed by the back processor. Such re-execution is the key to eliminating the centralized structures that are normally associated with very large instruction windows.