Institute of Electrical & Electronic Engineers
Due to stagnant clock speeds and high power consumption of commodity microprocessors, database vendors have started to explore massively parallel co-processors such as FPGAs to further increase performance. A typical approach is to push simple but compute-intensive operations (e.g., pre-filtering, (de)compression) to FPGAs for acceleration. In this paper, the authors show how a significantly more complex operation - the computation of the skyline - can be holistically implemented on an FPGA. A skyline query computes the pareto optimal set of multi-dimensional data points. These queries have been studied in software extensively over the last decade but this paper is the first to examine skyline computation in hardware.