Parallel Gauss-Seidel On A Torus Network-On-Chip Architecture

Computing problems from the scientific and engineering fields are getting more and more complex requiring large memory capacity and high computational speed. One way of matching these needs is by using parallel computing systems with a large number of processors. Network-on-Chip multicore architectures with a large number of processing elements are becoming a reality with the recent developments in technology. In these modern systems the processing elements are interconnected with regular Network-on-Chip (NoC) topologies such as meshes and trees. In this paper, the authors propose a parallel Gauss-Seidel (GS) iterative algorithm for solving large systems of linear equations on a torus NoC architecture.

Provided by: World Science Festival Topic: Data Centers Date Added: Dec 2012 Format: PDF

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