Parallel Programming of High-Performance Reconfigurable Computing Systems with Unified Parallel C

Download Now
Provided by: George Washington University
Topic: Hardware
Format: PDF
High-Performance Reconfigurable Computers (HPRCs) integrate nodes of either microprocessors and/or Field Programmable Gate Arrays (FPGAs) through an interconnection network and system software into a parallel architecture. For domain scientists who lack the hardware design experience, programming these machines is near impossible. Existing high-level programming tools such as C-to-hardware tools only address designs on one chip. Other tools require the programmer to create separate hardware and software program modules. An application programmer needs to explicitly develop the hardware side and the software side of his/her application separately and figure out how to integrate the two in order to achieve intra-node parallelism.
Download Now

Find By Topic