Performance Analysis for Multipliers Based Correlator

Here the authors are going to compares the use of multipliers and without DSP slices cross-correlation for IEEE 802.16d Orthogonal Frequency Division Multiplexing (OFDM) timing synchronization on Xilinx Virtex- 6 and Spartan-6 Field Programmable Gate Arrays (FPGAs). They compare a multipliers correlation based design and pipelined correlator design to four different quantization's of in terms of resource utilization and power consumption. to make the design universal they have to use multipliers. Results show that multiplier system coefficient quantization can yield accurate timing synchronization, and does so at high clock speeds.

Provided by: International Journal of Engineering Research and Applications (IJERA) Topic: Hardware Date Added: Apr 2014 Format: PDF

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