Academy & Industry Research Collaboration Center
Viterbi decoder is employed in wireless communication to decode the convolutional codes; those codes are used in every robust digital communication systems. Convolutional encoding and viterbi decoding is a powerful method for forward error correction. This paper deals with synthesis and implementation of viterbi decoder with a constraint length of three as well as seven and the code rate of 1/2 in FPGA (Field Programmable Gate Array). The performance of viterbi decoder is analyzed in terms of resource utilization.