International Journal of Engineering Sciences & Research Technology (IJESRT)
Carry SeLect Adder (CSLA) is the faster adder used in many computational systems to alleviate the problem of carry propagation delay. It consists of two Ripple Carry Adders (RCA) and multiplexer (mux). To reduce the power in the CSLA an efficient gate level modification is used. The comparison of results analysis shows that the modified SQRT CSLA structure has better performance than the regular SQRT CSLA. Carry select adder using BEC-1 converter is very much efficient in VLSI implementation is designed here.