International Journal of Engineering Trends and Technology
In the world of integrated circuits, CMOS has lost its credential during scaling beyond 32nm. The main drawbacks of using CMOS transistors are high power consumption and high leakage current. Scaling causes severe Short Channel Effects (SCEs) which are difficult to suppress. As technology is scaled down, the importance of leakage current and power analysis for VLSI design is increasing since short-channel effects cause an exponential increase in the leakage current and power dissipation. CNT-FET technologies mitigate these limitations by providing a stronger control over a thin silicon body.