Performance Evaluation and Optimization of Dual-Port SDRAM Architecture for Mobile Embedded Systems

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Provided by: Association for Computing Machinery
Topic: Storage
Format: PDF
Recently Dual-Port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local memories and the shared memory for both processors. In order to keep memory consistency from simultaneous accesses of both ports, every access to the shared memory should be protected by a synchronization mechanism, which can result in substantial access latency. The authors propose two optimization techniques by exploiting the communication patterns of target application: lock-priority scheme and static-copy scheme.
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