Low power flip-flops are very important for low-power digital designs. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices have shrunk down to nanometer ranges. Due to the usage of millions of components and shrinking process technology, power consumption is drastically high in nano MOSFETs. Hence the paradigm has shifted to Carbon Nano Tube FET (CNTFET). In this paper, impact of 32 nm MOSFET and 32nM CNTFET in the design of single edge triggered D-flip flop based shift registers are measured in terms of average power, delay, power delay product, rise time and fall time.