National Chiao Tung University
Embedded systems often use a heterogeneous multi-core processor to improve performance and energy efficiency. This multi-core processor is composed of a General Purpose Processor (GPP), which manages the program flow and I/O, and a Digital signal Processor (DSP), which processes mass data. An Inter-Processor Communication (IPC) mechanism is thus required to exchange data between a GPP and a DSP. This paper uses comprehensive experiments to evaluate the IPC performance of an embedded heterogeneous multi-core processor under different design strategies.