Pipeline Schedule Synthesis for Real-Time Streaming Tasks with Inter/Intra-instance Precedence Constraints

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Provided by: edaa
Topic: Hardware
Format: PDF
Heterogeneous multi-core platforms are widely accepted for high performance multimedia embedded systems. Although pipeline techniques can enhance performance for the multi-core platforms, data dependencies for processing compressed multimedia data makes it difficult, if not impossible, to automate pipelined design. In this paper, the authors target on multimedia streaming applications on heterogeneous multi-core platforms and develop the \"Tile piecing algorithm\" for pipelined schedule synthesis within the targeted applications and platforms. The algorithm gives an efficient way to construct a pipelined schedule.
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