Power Constrained and Defect-Probability Driven SoC Test Scheduling with Test Set Partitioning

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Provided by: Linkoping University
Topic: Hardware
Format: PDF
In this paper, the authors present a test scheduling approach for System-on-Chip (SoC) production tests with peak-power constraints. An abort-on-first-fail test approach is assumed, whereby the test is terminated as soon as the first fault is detected. Defect probabilities of individual cores are used to guide the test scheduling and the peak-power constraint is considered in order to limit the test concurrency. Test set partitioning is used to divide a test set into several test sequences so that they can be tightly packed into the two-dimensional space of power and time. The partitioning of test sets is integrated into the test scheduling process.
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