Power Consumption of the Shared L2 Cache Dynamic Partition in CMP

Provided by: AICIT
Topic: Hardware
Format: PDF
With the trend towards Chip Multi-Processors (CMP), the size of Cache increases apparently. But these caches propose larger and larger proportion in the total power consumption. This paper proposes a new mechanism that implemented in CMP to reduce energy consumption, which based on dynamically way-adaptable cache. The mechanism mainly consists of way reallocate module and dynamic power control module. Way reallocate module reassign ways between cores based on thread's working set on the execution of the program. The authors' mechanism implements low power consumption by dynamic power control module.

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