Predictable Flight Management System Implementation on a Multicore Processor
Multicore processors are becoming the only solutions available for the development of embedded safety critical applications with increasing performance requirements. These architectures are challenging for safety critical applications because they are in general not predictable, in the sense that evaluating the Worst Case Execution Time (WCET) of an application is almost impossible and synchronizing the different cores precisely is sometimes hardly achievable. The difficulties increase when the multicore hosts several applications and in particular mixed critical applications. This paper presents an approach for hosting a representative avionic function on a distributed-memory multicore COTS architecture.