Quasi-cyclic Random Projection Code and Hardware Implementation
Random Projection Code (RPC) is a mechanism that combines channel coding and modulation together and realizes rate adaptation in the receiving end. Random projection code's mapping matrix has significant influences on decoding performance as well as hardware implementation complexity. To reduce hardware implementation complexity, the authors design a quasi-cyclic mapping matrix for RPC codes. Compared with other construction approaches, their design gets rid of data filter component, thus reducing chip area 7284.95um2, and power consumption 331.46uW in 0.13um fabrication.