Institute of Research in Engineering and Technology (IRET)
In this paper, the authors present a low power implementation of a secure EPC UHF passive digital base band processor designed for UWB transceiver on RFID for wireless application is described. To ensure the secure information transaction of the passive tag, traditionally the focus is on directly applying a low complexity encryption engine. The attackers could make use of known header to reveal the secret key. The proposed architecture consists of a novel clock and data flow solution enforced by an anti-collision algorithm engine embedded inside the RFID passive tag.