Institute of Electrical & Electronic Engineers
Reconfigurable computing has been driven largely by the development of commodity Field-Programmable Gate Arrays (FPGAs). Standard FPGAs are somewhat of a mixed blessing for this field. In this paper, the authors give a brief overview of programming logics and they present configurable Logic Block (CLB) and Look Up Table (LUT) as logic elements. Also, they presented the definition of fine and coarse-grain architectures and present some commercial examples. This paper is also introduced the reconfigurable computing models like static and dynamic, single and multi-context and partial reconfiguration architectures. Finally run-time reconfigurable computing and the coupling of Reconfigurable Processing Unit (RUP) delineated.