Reconfigurable FFT System on Chip (SOC)

With on-set of paradigms of System-On-Chip (SOC) to design a module for real time applications or voice codec’s, The SOC’s have different requirements for operands precision the authors propose a reusable FFT using reconfigurable multiplier. However, the FFT perform both combining N and N/2 bit multiplications in the same N-bit tree multiplier. The key challenges in designing a reusable FFT are to limit the impact of flexibility on power operations that are needed for FFT butterfly to perform better than a conventional, dedicated FFT butterfly.

Subscribe to the Innovation Insider Newsletter

Catch up on the latest tech innovations that are changing the world, including IoT, 5G, the latest about phones, security, smart cities, AI, robotics, and more. Delivered Tuesdays and Fridays

Subscribe to the Innovation Insider Newsletter

Catch up on the latest tech innovations that are changing the world, including IoT, 5G, the latest about phones, security, smart cities, AI, robotics, and more. Delivered Tuesdays and Fridays

Resource Details

Provided by:
International Journal of Computer Applications
Topic:
Hardware
Format:
PDF