Restructuring Field Layouts for Embedded Memory Systems

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In many computer systems with large data computations, the delay of memory access is one of the major performance bottlenecks. In this paper, the authors propose an enhanced field remapping scheme for dynamically allocated structures in order to provide better locality than conventional field layouts. Their proposed scheme reduces cache miss rates drastically by aggregating and grouping fields from multiple instances of the same structure, which implies the performance improvement and power reduction. Their methodology will become more important in the design space exploration, especially as the embedded systems for data oriented application become prevalent.

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