International Journal of Engineering Research and Applications (IJERA)
Main focus of project is on implementation of Neural Network Architecture (NNA) with on chip learning on Analog VLSI technology for signal processing application. In the proposed paper the analog components like Gilbert Cell Multiplier (GCM), Neuron Activation Function (NAF) are used to implement artificial NNA. Analog components used comprises of multiplier, adder and tan sig-modal function circuit using MOS transistor. This neural architecture is trained using Back Propagation (BP) algorithm in analog domain with new techniques of weight storage.