Sandbox Prefetching: Safe Run-Time Evaluation of Aggressive Prefetchers

Provided by: The University of Tulsa
Topic: Hardware
Format: PDF
Modern high performance microprocessors employ hardware prefetching techniques to mitigate the performance impact of long memory latencies. These prefetchers operate by predicting which memory addresses will be accessed by a program in the near future and then speculatively issuing memory requests for those addresses. The performance improvement afforded by a prefetcher depends on its ability to correctly predict the memory addresses accessed by a program. Accurate prefetches hide the memory latency of potential demand misses by bringing data earlier to the on-chip caches.

Find By Topic