Scalable and Reliable Communication for Hardware Transactional Memory

Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This paper is especially true for a large-scale distributed memory system where multiple transactions may attempt to commit simultaneously and co-ordination is required before allowing commits to proceed in parallel. In this paper, the authors propose novel algorithms to implement commit that are more scalable in terms of delay and are free of deadlocks/livelocks.

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