Security Challenges During VLSI Test

VLSI testing is a practical requirement, but unless proper care is taken, features that enhance testability can reduce system security. Data confidentiality and intellectual property protection can be breached through testing security breaches. In this paper, the authors review testing security problems, focusing on the scan technique. They then present some countermeasures which have recently been published and they discuss their characteristics. Integrated circuit testing has emerged in recent years as a new security problem. Indeed, while testability requires observability and controllability of internal states, security often requires the opposite. It has been shown that confidential data and intellectual property can be jeopardized by standard Design for Test (DfT) techniques.

Provided by: Polytechnic Institute of New York University Topic: Security Date Added: May 2011 Format: PDF

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