Serial and Parallel FPGA-Based Variable Block Size Motion Estimation Processors

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Provided by: Springer Healthcare
Topic: Hardware
Format: PDF
H.264/AVC is the latest video coding standard adopting Variable Block size Motion Estimation (VBS-ME), quarter-pixel accuracy, motion vector prediction and multi-reference frames for motion estimation. These new features result in much higher computation requirements than previous coding standards. In this paper, the authors propose a novel Most Significant Bit (MSB) first bit-serial architecture for full-search block matching VBS-ME, and compare it with systolic implementations. Since the nature of MSB-first processing enables early termination of the Sum of Absolute Difference (SAD) calculation, the average hardware performance can be enhanced.
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