Vienna University of Economics and Business
To build a System-on-Chip (SoC) a common interface standard is necessary to connect ready-to-use components from different vendors. Today several SoC interconnect standards, such as AMBA, Wishbone, OPB, and Avalon, are in use. In this paper, the authors show that those standards have a common drawback for on-chip interconnections: they are built on the model of a common backplane bus that does not fit very well for on-chip interconnections. They provide a new, simple on-chip interconnect specification for the well accepted master/slave model.