Simulation and Synthesis of Field-Programmable Gate Array

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Provided by: International Journal on Electronics & Communication Technology (IJECT)
Topic: Hardware
Format: PDF
Field-Programmable Gate Arrays (FPGA's) are now widely used for the implementation of digital systems, and many commercial architectures are available. Although the literature and data books contain detailed descriptions of these architectures, there is very little information on how the high-level architecture was chosen, and no information on the circuit-level or physical design of the devices. This paper describes the high-level architectural design of a static-random-access memory programmable FPGA. A forthcoming Part II will address the circuit design issues through to the physical layout.
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