Software Transactional Memory Friendly Slot Schedulers

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Provided by: IIT
Topic: Storage
Format: PDF
In this paper, the authors discuss the design space of highly concurrent linearizable data structures for slot scheduling. They observe that it is not possible to have high fairness across threads, and maximize throughput of the entire system simultaneously. Lock free algorithms are very fast, yet very unfair, and wait free algorithms follow the reverse trend. They thus propose a class of algorithms using Software Transactional Memory (STM) that are in the middle of the spectrum. They equitably balance fairness and throughput, and are much simpler to design and verify.
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