International Journal on Electronics & Communication Technology (IJECT)
In this paper a digital signal processor is designed on SPARTAN-6 LX45 FPGA. This processor consist of an signal analyzer i.e. it will do the compression, noise removal and amplification type of data management. This is a VLSI based paper means there are two sections, one is front end and other one is back end. In this paper, front end design means simulation, synthesis, and extraction of bit file is done using VHDL on Xilinx 14.2. Coming to back end, a micro blaze processor with AC-97 Audio Codec is designed on Xilinx 14.2 EDK (Embedded Development Kit).