Speeding-Up SIMD Instructions Dynamic Binary Translation in Embedded Processor Simulation

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Provided by: edaa
Topic: Hardware
Format: PDF
In this paper, the authors present a strategy to speed-up the simulation of processors having SIMD extensions using dynamic binary translation. The idea is simple: benefit from the SIMD instructions of the host processor that is running the simulation. The realization is unfortunately not easy, as the nature of all but the simplest SIMD instructions is very different from a manufacturer to another. To solve this issue, the authors propose an approach based on a simple 3-addresses intermediate SIMD instruction set on which and from which mapping most existing instructions at translation time is easy.
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