Institute of Research and Journals (IRAJ)
Now-a-days, most microprocessors and microcontroller designs are based on Reduced Instruction Set Computer (RISC); RISC is design philosophy that has become main stream in scientific and engineering applications. The demand for the Digital Signal Processor (DSP) increases with the advent of personal computer, Smartphone, gaming and other multimedia devices. Todays, FPGA s become an important platform that implementing high end DSP processors applications due to their inherent parallelism and fast processing speed. This paper focuses on the study of 32-bit three stages pipelined combined RISC and DSP processor based on FPGA.