System Energy Minimization via Joint Optimization of the DC-DC Converter and the Core

Provided by: University of Idaho
Topic: Hardware
Format: PDF
This paper addresses the problem of designing energy-efficient embedded systems by jointly optimizing the power consumption of both the DC-DC converter and the computational core. Past work has shown that there exists a Minimum Energy Operating Point (MEOP) in the sub-threshold region for computational cores (C-MEOP), at which the dynamic and leakage powers are balanced. The MEOP is defined by the 3-tuple consisting of the optimum energy consumption E, optimum voltage V and optimum frequency f. First, the authors show that the DC-DC converter losses in Dynamic Voltage Scaling (DVS) cause the overall System MEOP (S-MEOP) to differ significantly from C-MEOP.

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