System Level Performance Simulation for Heterogeneous Multi-Processor Architectures

Provided by: University of Engineering and Technology, Taxila
Topic: Hardware
Format: PDF
Performance modeling for real-time multi-processor architectures is a challenging task in the design phase of embedded hardware/software systems. As SystemC is well suited for designing a functional model of hardware/software systems, it is desirable to use SystemC with its simulation capabilities to evaluate the performance of architecture for the designed system as well. Some approaches on the basis of SystemC are known to perform this task. However, many of these approaches are not applicable at the system level where complex applications are mapped to heterogeneous multi-processor architectures.

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