SYSTEMCODESIGNER-An Automatic ESL Synthesis Approach by Design Space Exploration and Behavioral Synthesis for Streaming Applications

Provided by: University of Engineering and Technology, Taxila
Topic: Hardware
Format: PDF
With increasing design complexity, the gap from ESL (Electronic System Level) design to RTL synthesis becomes more and more crucial to many industrial projects. Although several behavioral synthesis tools exist to automatically generate synthesizable RTL code from C/C++/SystemC based input descriptions and software generation for embedded processors is automated as well, an efficient ESL synthesis methodology combining both is still missing. This paper presents SYSTEMCODESIGNER, a novel SystemC-based ESL tool to automatically optimize a hardware/software SoC (System-on-Chip) implementation with respect to several objectives.

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