SystemLevel ApplicationAware Dynamic Power Management in Adaptive Pipelined MPSoCs for Multimedia

Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
System-level Dynamic Power Management (DPM) schemes in Multi-Processor System-on-Chips (MPSoCs) exploit the idleness of processors to reduce the energy consumption by putting idle processors to low-power states. In the presence of multiple low-power states, the challenge is to predict the duration of the idle period with high accuracy so that the most beneficial power state can be selected for the idle processor. In this paper, the authors propose a novel dynamic power management scheme for adaptive pipelined MPSoCs, suitable for multimedia applications.

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