TAP: A TLP-Aware Cache Management Policy for a CPU-GPU Heterogeneous Architecture

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Provided by: Georgia Institute of Technology
Topic: Hardware
Format: PDF
Combining CPUs and GPUs on the same chip has become a popular architectural trend. However, these heterogeneous architectures put more pressure on shared resource management. In particular, managing the Last-Level Cache (LLC) is very critical to performance. Lately, many researchers have proposed several shared cache management mechanisms, including dynamic cache partitioning and promotion-based cache management, but no cache management work has been done on CPU-GPU heterogeneous architectures. Sharing the LLC between CPUs and GPUs brings new challenges due to the different characteristics of CPU and GPGPU applications.
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