Performance modeling for real-time multi-processor architectures is a challenging task when designing hardware/software systems. As SystemC is well suited for designing such systems, it is desirable to also use SystemC's simulation capabilities for performance evaluation. A simulation approach that permits the ability to simulate a set of processors running an operating system in parallel to hardware modules is described. A set of software tasks is assigned to each processor and the end of each atomic operation is augmented by an await function call allowing for preemption. This results in a substantial modification of the source code.