Task Scheduling for Reliable Cache Architectures of Multiprocessor Systems
A Single Event Upset (SEU) on a memory module often causes a soft error of a computer system. This paper presents a task scheduling method for Reliable Cache Architectures (RCAs) of multiprocessor systems. The RCAs dynamically switch their operation modes for reducing the usage of vulnerable SRAMs under real-time constraints. A mixed integer programming model has been built for minimizing vulnerability under real-time constraints. Experimental results have shown that the authors' task scheduling method achieved 47.7-99.9% less vulnerability than a conventional approach.