TCAD Based Analysis of Gate Leakage Current for High-K Gate Stack MOSFET
Scaling of metal-oxide semi-conductor transistors to smaller dimensions has been a key driving force in the IC industry. This paper analysis the gate leakage current behavior of nano-scale MOSFET based on TCAD simulation. The sentaurus simulator simulates the high-k gate stack structure of N-MOSFET for analysis purpose. The impact of interfacial oxide thickness on the gate tunneling current has been investigated as a function of gate voltages for a given Equivalent Oxide Thickness (EOT) of 1.0nm. It was reported in the results that inter-facial oxide thickness plays an important role in reducing the gate leakage current.