Test Scheduling with Thermal Optimization for Network-on-Chip Systems Using Variable-Rate On-Chip Clocking

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Provided by: edaa
Topic: Hardware
Format: PDF
Chip overheating has become a critical problem during test of today's complex core-based systems. In this paper, the authors address the overheating problem in Network-on-Chip (NoC) systems through thermal optimization using variable-rate on-chip clocking. They control the core temperatures during test scheduling by assigning different test clock frequencies to cores. They present two heuristics to achieve thermal optimization and reduced test time. Experimental results for example NoC systems show that the proposed method can guarantee thermal safety and yield better thermal balance, compared to previous methods using power constraints. Test application time is also reduced.
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