International Association of Engineers
Embedded systems have drastically grown in importance and complexity in recent years. Many systems are now designed using Field Programmable Gate Array (FPGA) due to its size, flexibility, and resources. This paper presents the design and implementation of a flexible and user reconfigurable Universal Synchronous Asynchronous Receive Transmit (USART) IP core suitable for use in embedded systems and Systems on Chip (SoC). The design scheme employed allows the USART to be used in various modes of operation such as standalone and 9-bit addressable mode for multi-drop networks.