International Journal of Recent Development in Engineering and Technology (IJRDET)
The process of code generation is chiefly involved with three interrelated optimization tasks: instruction selection (with resource allocation), instruction scheduling and register allocation. For most of the architectures and in most situations, these tasks have been discovered to be NP-hard. A common approach for code generation includes solving each task separately, i.e. in a decoupled manner, which is easier from a software-engineering point of view. Phase-decoupled compilers generate good code quality for regular architectures, but if applied to DSPs the generated code results in with significantly lower performance due to strong interdependences between the different tasks.