University of Toledo
Embedded systems increasingly exploit the cost effectiveness and flexibility of FPGAs. Such FPGA-based systems often include soft processors for several reasons; for example, certain tasks are best, cost- or performance-wise, implemented in processors, whereas processor-based implementations can be faster and easier to develop, and debug than custom accelerators. As a step toward a viable, single-issue out-of-order soft core, this paper presents Copy-Free Checkpointing (CFC), an FPGA-friendly register renaming design. CFC supports speculative execution by implementing checkpoint recovery. Compared against the best conventional register renaming implementation CFC requires 7.5x to 6.4x fewer LUTs and is at least 10% faster.