Transaction Based Modeling and Verification of Hardware Protocols

Provided by: IBM
Topic: Hardware
Format: PDF
Modeling hardware through atomic guard/action transitions with interleaving semantics is popular, owing to the conceptual clarity of modeling and verifying the high level behavior of hardware. In mapping such specifications into hardware, designers often decompose each specification transition into sequences of implementation transitions taking one clock cycle each. Some implementation transitions realizing a specification transition overlap. The implementation transitions realizing different specification transitions can also overlap. The authors present a formal theory of refinement, showing how a collection of such implementation transitions can be shown to realize a specification.

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