Transaction Level Platform Modeling in SystemC for Multi-Processor Designs

Provided by: University of California, Davis
Topic: Hardware
Format: PDF
In this paper, the authors describe transaction level platform modeling in SystemC for MPSoC designs. The MPSoC platform is a net-list of processing elements, busses and bridge elements. The processing elements which can host a process (a C program) or memory. Busses, modeled as Universal Bus Channels (UBCs), offer communication functions for these processes and bridge elements (transducers) link different busses together. This platform yields an executable transaction level SystemC model, and has the advantage that the designer can use the existing C code and will yield a completely simulatable platform.

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