Unified Microprocessor Core Storage

The organization and management of microprocessor storage structures (e.g., L1 caches, TLBs, etc.) is critical to the performance and energy consumption of the microprocessor. The authors propose and develop the first microprocessor that can dynamically allocate storage to the structures that need it. They replace each existing structure with a dedicated micro-cache that is smaller than is typical for that structure. With the smaller sizes, these structures can be made faster and less energy-hungry than the original full-size versions. They back up all of the micro-caches with a single Unified Core Storage (UCS).

Provided by: Association for Computing Machinery Topic: Storage Date Added: May 2007 Format: PDF

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