Using Magnetic RAM to Build Low-Power and Soft Error-Resilient L1 Cache

Provided by: Institute of Electrical and Electronics Engineers
Topic: Hardware
Format: PDF
Due to its great scalability, fast read access, low leakage power, and non-volatility, Magnetic Random Access Memory (MRAM) appears to be a promising memory technology for on-chip cache memory in microprocessors. However, the write-to-MRAM process is relatively slow and results in high dynamic power consumption. Such inherent disadvantages of MRAM make researchers easily conclude that MRAM can only be used for low-level caches (e.g., L2 or L3 cache), where cache memories are less frequently accessed and slow write to MRAM can be more easily compensated using simple architectural techniques.

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