VASILE: A Reconfigurable Vector Architecture for Instruction Level Frequency Scaling

Provided by: Delft University of Technology
Topic: Hardware
Format: PDF
Coarse-grained dynamic frequency scaling has been extensively utilized in embedded (multiprocessor) platforms to achieve energy reduction and by implication to extend the autonomy and battery lifetime. In this paper the authors propose to make use of fine-grained frequency scaling, i.e., adjust the frequency at instruction level; to increase the instruction throughput of a FPGA implemented Vector Processor (VP). They introduce a VP architectural template and an associated design methodology that enables the creation of application requirements tailored VP instances.

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