Vedic Optimized ALU with a New Approach Urdhva Triyambakam Multiplier

For fast operations multiplication is very important in arithmetic unit. Available Vedic multiplication hardware has certain limitations, if area is in concern. To reduce these limitations a different approach has been proposed to design the Vedic multiplier with new proposed addition structure. To meet major concern i.e. 'Speed', proposed paper need a high speed ALU. The speed of ALU generally depends upon the speed of its multiplication unit used. Proposed multiplication techniques Vedic and tree addition structure gives a very fast and area optimized multiplication method. The proposed model gives ALU algorithm which is efficient in both area and speed.

Provided by: International Journal of Modern Engineering and Research Technology (IJMERT) Topic: Hardware Date Added: Oct 2014 Format: PDF

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